1. Field of the Invention
The present invention relates to a switching mode power supply and a switch thereof.
2. Description of the Related Art
A switching mode power supply (hereinafter referred to as an “SMPS”) is a device that first rectifies an input AC voltage to an input DC voltage (sometimes referred to as a DC-Link voltage) and then converts the input DC voltage to an output DC voltage having a different level. In various designs and applications the output DC voltage can be higher or lower than the input DC voltage. The SMPS is generally used for electronic devices such as a battery charger of a mobile phone and an adaptor of a laptop computer.
In some SMPS, a maximum limit current ILIM is set. In case of a short circuit or an overload of an output terminal, when a current Id of a main switch reaches the maximum limit current ILIM, damage to the main switch due to the excessive current is prevented by turning off the main switch in the corresponding switching period. These designs limit the maximum power, transmitted to the output terminal. When designing the SMPS, the maximum limit current ILIM plays an important role in determining the rating of the used elements, such as that of secondary rectifying diodes.
However, setting the maximum limit current ILIM may not provide sufficient protection of the SMPS. For example, the actual main switch current Id varies according to an input voltage with a delay. The corresponding delay time may have several components, caused by different elements of the SMPS. The components include an internal propagation delay time of the SMPS and a turn-off delay time of the main switch. The delay time causes design problems because the rating of circuit elements of the SMPS needs to be selected according to the highest main switch current Id. Since the delay time may cause Id to exceed ILIM, elements with higher ratings need to be used, leading to an increase in production cost.
FIG. 1 is a diagram illustrating a main switch current Id, flowing to a main switch of a typical SMPS, according to an input voltage Vin, in an ideal case with zero delay time.
As the input voltage Vin changes from a low voltage V1 to a high voltage V2, the slope of the main switch current Id increases. When the input voltage Vin assumes a low voltage V1, t1, a time to reach the maximum limit current ILIM is longer than t2, a time to reach a maximum limit current ILIM when the input voltage Vin assumes a high voltage V2.
As shown in FIG. 1, in the idealized case of zero delay time, the maximum of the main switch current Id essentially equals the maximum limit current ILIM regardless of the slope of the main switch current Id. Therefore, the maximum power transmitted to an output terminal is independent of the input voltage Vin.
FIG. 2 illustrates the main switch current Id in a typical SMPS for different input voltages Vin, in the case of finite delay times.
FIG. 2 shows a case when the delay time Δt is a finite constant, independent of the input voltage Vin. As seen earlier, the slope of the main switch current Id is approximately proportional to the input voltage Vin. Therefore, during the delay time Δt, the main switch current Id overshoots the maximum limit current ILIM by an amount which depends on the value of the input voltage Vin. For the higher input voltage V2 the overshoot is greater than for the lower input voltage V1.
The maximum of the main switch current Id will be referred to as the maximum limit current ILIM. As shown in FIG. 2, the maximum limit current ILIM2 in the case of a higher input voltage V2 can considerably exceed the maximum limit current ILIM1, reached when the input voltage assumes its lower value V1. A difference in the maximum limit current flowing to a main switch on the primary side can cause a serious problem in that maximum output power of an output terminal is affected by the level of an input voltage.
In order to solve the problem, U.S. Pat. Nos. 6,674,656 and 6,665,197 disclose an SMPS including an additional circuit for uniformly controlling the maximum limit current ILIM to be independent of the input voltage, even when there is a finite delay time.
Currently, research to decrease the size and cost of an SMPS and an SMPS controller is being actively performed. However, the SMPS that is disclosed in U.S. Pat. Nos. 6,674,656 and 6,665,197 includes an additional circuit for uniformly controlling the maximum limit current ILIM, such that it is difficult to achieve the decrease in size and cost of the SMPS and the SMPS controller.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.